Tektronix MTG100 Instrukcja Użytkownika Strona 169

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Appendix A: Specifications
AĆ6
MTG100 & MTG300 MPEG Generator User Manual
Table AĆ2: Electrical characteristics (Cont.)
Characteristics Description
ECL/TTL/LVDS output (serial)
Connector type DĆsub, 25 pin (the same connector as Parallel output)
Output level (Output on)
(J310101 and above)
Note: Do not connect the Asserted Low pins for singleĆend use. Do not connect the Not ManĆ
aged" pins to GND pins.
TTL 0 V to 2.8 V (without termination)
LVDS 0.8 V to 1.60 V (without termination)
ECL* -1.8 V to -0.9 V (without termination)
Output resistance, typical
(Output off)
350 at5VtoGNDpin(When the output is off, the power of the buffer amplifier is cut off.)
Data rate 0.5 Mbps to 64 Mbps
Pin Assignment 1 DCLK
2GND
3 to 8 Not managed
9 Gated Clock
10 DATA 0
11 DVALID
12 PSYNC
13 Shield
14 DCLK
15 GND
16 to 21 Not managed
22 Gated Clock
23 DATA 0
24 DVALID
25 PSYNC
DCLK
Gated Clock
DVALID
Timing relationship between DCLK and Gated Clock
ASI output Complies with EN50083Ć9 Annex B.
Connector type BNC
Impedance, typical 75
Output voltage 800 mV ± 10%
Deterministic Jitter 10% (pĆp)
Random Jitter 8% (pĆp)
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